Silicon-based device manufacture almost always involves epitaxial growth of Si-containing semiconductor material (typically Si, but not excluding Ge.sub.x Si.sub.1-x and GaAs) on a single crystal Si substrate. A precondition for growth of high quality epitaxial material is cleanliness of the Si substrate surface on an atomic scale. Thus, Si surface cleaning is a critical process in the manufacture of Si-based semiconductor devices.
Currently, wet cleaning methods are commonly employed. However, "dry" (vapor phase) cleaning processes typically would be more easily integrated in a cluster tool environment and would permit cleaning of wafers with a patterned SiO.sub.2 layer thereon. Thus, development of simple, low cost and effective vapor phase cleaning processes for Si is of considerable interest to the industry. This application discloses such a process, capable of implementation at relatively low cost.
There are numerous disclosures of vapor phase cleaning processes for Si in the literature. Among these are several that deal with plasma cleaning techniques. See, for instance, W. R. Burger et al., J. Applied Physics, Vol. 62, p. 4255 (1987); M. Delfino et al., J Applied Physics, Vol. 71, p. 1001 (1992); and T. R. Yew et al., J. Applied Physics, Vol. 68, p. 4681 (1990). However, none of the disclosed plasma techniques are free of disadvantages.
For instance, the Ar plasma sputter cleaning process described by Burger et al. typically results in a heavily dislocated epitaxial layer unless a high-temperature anneal precedes the epitaxial growth. The Delfino et al. paper discloses Si cleaning by means of a H.sub.2 plasma. More specifically, it discloses an electron cyclotron resonance (ECR) H.sub.2 plasma cleaning process. The process involves formation of a microwave plasma in proximity to a Si wafer on an electrode that is capacitively coupled to a RF power supply. The process requires relatively costly equipment, including vacuum pumps capable of providing a relatively low operating pressure (e.g., 1.times.10.sup.-3 Torr). The Yew et al. paper discloses Ar/H.sub.2 RF plasma sputter cleaning of oxide-patterned Si wafers in the temperature range 500.degree.-800.degree. C. The disclosed high temperatures limit the usefulness of this approach.